(China (Mainland))
Product Summary
The AS7C1026B is a high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) device organized as 65,536 words ×
16 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired.
Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 5, 6, 7, 8 ns are ideal for
high-performance applications.
Parametrics
? JEDEC standard packaging
- 44-pin 400 mil SOJ
- 44-pin TSOP 2-400
? ESD protection ≥ 2000 volts
? Latch-up current ≥ 200 mA
Features
? Industrial and commercial versions
? Organization: 65,536 words × 16 bits
? Center power and ground pins for low noise
? High speed
- 10/12/15/20 ns address access time
- 5, 6, 7, 8 ns output enable access time
? Low power consumption: ACTIVE
- 605 mW / max @ 10 ns
? Low power consumption: STANDBY
- 55 mW / max CMOS I/O
? 6 T 0.18 u CMOS technology
? Easy memory expansion with CE, OE inputs
Diagrams
| Image | Part No | Mfg | Description |  |
Pricing (USD) |
Quantity | ||||||||||||
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 AS7C1026B-20TCN |
Alliance Memory |
SRAM 1M Fast 64K x 16 5V Asynch |
Data Sheet |
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AS7C1026B-20TCNTR |
Alliance Memory |
SRAM 1M Fast 64K x 16 5V Asynch |
Data Sheet |
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