Product Summary

The logic element (LE) is the smallest unit of logic in the FLEX 8000 architecture, with a compact size that provides efficient logic utilization.  Each LE contains a 4-input LUT, a programmable flipflop, a carry chain, and cascade chain. Figure 3 shows a block diagram of an LE.

Parametrics

 I/O interface enabling device core to run at 5.0 V,
while I/O pins are compatible with 5.0-V and 3.3-V logic levels
– Low power consumption (typical specification less than 0.5 mA

Features

System-level features
– In-circuit reconfigurability (ICR) via external Configuration
EPROM or intelligent controller
– Fully compliant with the peripheral component interconnect
(PCI) standard
– Built-in Joint-Test Action Group (JTAG) boundary-scan test (BST)
circuitry compliant with IEEE Std. 1149.1-1990 on selected devices
– MultiVolt
Flexible interconnect
– FastTrack
 Interconnect continuous routing structure for fast,
predictable interconnect delays
– Dedicated carry chain that implements arithmetic functions such
as fast adders, counters, and comparators (automatically used by
software tools and megafunctions)
– Dedicated cascade chain that implements high-speed, high-fan-in
logic functions (automatically used by software tools and
megafunctions)
– Tri-state emulation that implements internal tri-state nets
Powerful I/O pins
– Programmable output slew-rate control reduces switching noise
Peripheral register for fast setup and clock-to-output delay

Diagrams